‘Govt.’s semiconductor mission will promote research’

Enough grounded facts gathered. Writing the study note now.

1. At a Glance

2. Why in the News

3. Background & Evolution

4. Core Static Facts

Item Detail
Nodal ministry Ministry of Electronics and Information Technology (MeitY) [S6]
Scheme name India Semiconductor Mission (ISM); ISM 2.0 (Budget 2026-27) [S1][S2]
CEO, ISM Amitesh Kumar Sinha (also Additional Secretary, MeitY) [S6]
ISM 1.0 launch December 2021 [S3]
ISM 2.0 outlay (FY2026-27) ₹1,000 crore [S1]
ISM 1.0 cumulative investment ₹1.60 lakh crore across 10 projects, 6 states (Dec 2025) [S1]
Design ecosystem stat India has ~20% of world's semiconductor design engineers; domestic design industry annual revenue <₹150 crore [S3][S6]
Related scheme Design-Linked Incentive (DLI) Scheme, 2021, 5-year window, target 20+ design firms, turnover >₹1,500 crore [S3]
ISM 2.0 target (2029) Domestic capability to design/manufacture chips for 70-75% of domestic applications [S1]
Technology node target 3nm and 2nm nodes under "Semicon 2.0" [S1]
Academic expansion From 315 to 500 academic institutions under ISM 2.0 [S1]
Long-term vision USD 120-150 billion semiconductor value chain by 2035 (NITI Aayog roadmap) [S1]
Host event of news The Hindu Deep Tech Summit 2026, Chennai, with SRM Institute of Science and Technology [S4]

5. Multi-Dimensional Analysis

Economic - Semiconductor manufacturing investment (₹1.60 lakh crore across 10 projects) signals large-scale FDI/private capex mobilisation under PLI-adjacent incentives [S1]. - Design-only strength (20% of global engineers) without local firms means value capture (IP, margins) currently flows to foreign fabless companies — ISM 2.0's IP/equipment focus targets this leakage [S3][S6].

Scientific/Technological - Push toward 3nm/2nm advanced nodes and "full-stack Indian semiconductor IP" reflects a shift from assembly/packaging (low value-add) to design and fabrication (high value-add) [S1]. - R&D and equipment manufacturing inclusion in ISM 2.0 addresses upstream capability gaps (chip-making equipment, materials) previously absent from ISM 1.0 [S6].

Administrative/Governance - ISM functions as an autonomous body under MeitY for scheme implementation, single-window clearances for fabs — a governance model relevant to "ease of doing business" debates [S3]. - Multi-state spread (6 states) raises federal coordination questions on land, power, water for fabs.

Geopolitical/Strategic - Part of India's broader "China+1"/friend-shoring positioning amid US-China chip war, relevant to supply-chain resilience diplomacy (QUAD critical tech cooperation).

Historical - Builds on decades of underinvestment since India missed the 1970s-80s wave of Asian semiconductor fabs (unlike Taiwan/South Korea), making ISM a "catch-up" industrial policy.

6. Recent Developments (last 12-18 months)

7. Prelims Hooks

8. Mains Relevance

9. Related Topics to Study Next

10. Common Errors / Trap Areas

11. Sources