‘Govt.’s semiconductor mission will promote research’

1. At a Glance

• India Semiconductor Mission (ISM) is MeitY's nodal programme to build a domestic semiconductor design, manufacturing, and packaging ecosystem [1].
• ISM 2.0, announced in Union Budget 2026-27, expands the mission into R&D, equipment manufacturing, and skilling — beyond ISM 1.0's design/fab/packaging focus [2][5].
• Relevant because it links Budget analysis, "Atmanirbhar Bharat" in electronics, and India's strategic push into critical/dual-use technology — a recurring GS-III (S&T, economy) theme.
• Despite India holding ~20% of the world's semiconductor design engineers, it has no major domestic design (fabless) companies — the "engineers-without-firms" paradox is the crux of the news hook [3][5].

2. Why in the News

• Amitesh Kumar Sinha, Additional Secretary, MeitY and CEO of ISM, said at The Hindu Deep Tech Summit 2026 (Chennai, April 2026) that ISM 2.0 will expand beyond Phase 1 to include R&D, equipment manufacturing, and skilling [5].
• Immediate trigger: Union Budget 2026-27 formally launched ISM 2.0 with a ₹1,000 crore provision for FY2026-27 [2].
• Coincides with NITI Aayog's "Future of India's Semiconductor Industry" roadmap release, targeting a USD 120-150 billion value chain by 2035 [1].

3. Background & Evolution

• ISM approved December 2021 under MeitY with an outlay of ~₹76,000 crore, offering fiscal support for semiconductor and display fabs, packaging (ATMP/OSAT), and chip design (via the Design-Linked Incentive/DLI scheme) [3].
• DLI Scheme launched 2021 for 5 years, targeting 20+ domestic design companies with turnover >₹1,500 crore [3].
• ISM 1.0 progress: 10 projects approved across 6 states with cumulative investment of ~₹1.60 lakh crore (as of December 2025) [1].
• Milestone: First Made-in-India chips presented to PM Narendra Modi; Union Minister Ashwini Vaishnaw hailed it as a "moment of pride" [1].
• Qualcomm's 2nm chip launch in Bengaluru flagged as a manufacturing-ecosystem milestone [1].
• Budget 2026-27 formally announces ISM 2.0, shifting focus to equipment/materials manufacturing, full-stack Indian semiconductor IP, and supply-chain resilience [1][2].

4. Core Static Facts

5. Multi-Dimensional Analysis

Economic

• Semiconductor manufacturing investment (₹1.60 lakh crore across 10 projects) signals large-scale FDI/private capex mobilisation under PLI-adjacent incentives [1].
• Design-only strength (20% of global engineers) without local firms means value capture (IP, margins) currently flows to foreign fabless companies — ISM 2.0's IP/equipment focus targets this leakage [3][5].

Scientific/Technological

• Push toward 3nm/2nm advanced nodes and "full-stack Indian semiconductor IP" reflects a shift from assembly/packaging (low value-add) to design and fabrication (high value-add) [1].
• R&D and equipment manufacturing inclusion in ISM 2.0 addresses upstream capability gaps (chip-making equipment, materials) previously absent from ISM 1.0 [5].

Administrative/Governance

• ISM functions as an autonomous body under MeitY for scheme implementation, single-window clearances for fabs — a governance model relevant to "ease of doing business" debates [3].
• Multi-state spread (6 states) raises federal coordination questions on land, power, water for fabs.

Geopolitical/Strategic

• Part of India's broader "China+1"/friend-shoring positioning amid US-China chip war, relevant to supply-chain resilience diplomacy (QUAD critical tech cooperation).

Historical

• Builds on decades of underinvestment since India missed the 1970s-80s wave of Asian semiconductor fabs (unlike Taiwan/South Korea), making ISM a "catch-up" industrial policy.

6. Recent Developments (last 12-18 months)

• Union Budget 2026-27: Formal launch of ISM 2.0 with ₹1,000 crore allocation [1][2].
• December 2025: ISM 1.0 status — 10 projects, ₹1.60 lakh crore investment, 6 states [1].
• NITI Aayog releases "Future of India's Semiconductor Industry" roadmap, projecting USD 120-150 billion value chain by 2035 [1].
• Qualcomm 2nm chip launch, Bengaluru, by Union Minister Ashwini Vaishnaw [1].
• April 2026: MeitY's Amitesh Kumar Sinha outlines ISM 2.0 expansion (R&D, equipment manufacturing, skilling) at The Hindu Deep Tech Summit, Chennai [5].

7. Prelims Hooks

• ISM 1.0 was approved in December 2021 under MeitY.
• ISM 2.0 was announced in the Union Budget 2026-27.
• ISM 2.0 FY2026-27 allocation: ₹1,000 crore.
• India has ~20% of the world's semiconductor design engineers but no major domestic fabless design company.
• Domestic semiconductor design industry's cumulative annual revenue is less than ₹150 crore.
• Design-Linked Incentive (DLI) Scheme launched in 2021 for 5 years targets 20+ domestic design firms with turnover above ₹1,500 crore.
• As of December 2025, 10 projects worth ₹1.60 lakh crore approved under ISM across 6 states.
• ISM 2.0 targets domestic capability for 70-75% of domestic chip applications by 2029.
• ISM 2.0 aims for 3nm and 2nm technology node capability under "Semicon 2.0."
• Academic institutions under the mission's ambit to expand from 315 to 500.
• NITI Aayog's semiconductor roadmap targets a USD 120-150 billion value chain by 2035.
• Amitesh Kumar Sinha is Additional Secretary, MeitY, and CEO of the India Semiconductor Mission.
• Qualcomm launched a 2nm semiconductor chip facility event in Bengaluru.
• Implementing/nodal ministry for ISM: MeitY, not Ministry of Commerce or DST.

8. Mains Relevance

• GS-III: Indigenisation of technology, developing new technology; Infrastructure — Investment models; Science & Technology — developments and applications.
• GS-II (secondary): Government policies and interventions for development in electronics/S&T sector.
• Possible question stems: 1. "India has a large pool of semiconductor design talent but lacks domestic design firms. Examine the reasons and evaluate how India Semiconductor Mission 2.0 addresses this gap." (GS-III) 2. "Discuss the strategic and economic significance of India's push for indigenous semiconductor manufacturing capability amid global supply chain realignment." (GS-III) 3. "Critically evaluate the shift in India's semiconductor policy from assembly/packaging incentives to R&D and equipment manufacturing under ISM 2.0." (GS-III)

9. Related Topics to Study Next

• Design-Linked Incentive (DLI) Scheme — direct sister scheme to ISM focused on fabless design companies.
• Production Linked Incentive (PLI) Scheme, electronics manufacturing — broader industrial policy framework ISM sits within.
• PLI for Large Scale Electronics Manufacturing (LSEM) — parallel scheme for downstream electronics assembly.
• Critical Minerals Mission — raw material (rare earths, silicon) dependency for chip manufacturing.
• Atmanirbhar Bharat / Make in India — overarching policy umbrella.
• US-China semiconductor/tech rivalry & CHIPS Act — geopolitical context shaping India's opportunity.
• NITI Aayog's sectoral roadmaps — institutional mechanism for long-term industrial strategy.
• Digital India / MeitY's broader mandate — parent ministry's other flagship programmes.

10. Common Errors / Trap Areas

• Confusing ISM (MeitY) with schemes under Ministry of Commerce & Industry or DST — ISM is squarely a MeitY mission.
• Mixing up ISM 1.0 (Dec 2021) launch year with ISM 2.0 (Budget 2026-27) launch year.
• Conflating the Design-Linked Incentive (DLI) Scheme (chip design focus) with the semiconductor fab/manufacturing incentives under ISM — they are distinct sub-components.
• Assuming India already has large domestic fabless design companies because of its engineering talent pool — the article stresses this gap does not exist yet.
• Misattributing the ₹1.60 lakh crore investment figure to ISM 2.0 rather than cumulative ISM 1.0 progress (as of December 2025).