UPSC Prelims Practice Questions — The impact of India-EU FTA for AI and semiconductor tech

Q1. Under the India–EU Free Trade Agreement framework concluded in January 2026, India's IndiaAI Mission is formally linked for joint cooperation on safe, human-centric AI with which one of the following EU bodies?

  • A. European Research Council
  • B. European AI Office
  • C. European Innovation Council
  • D. European Data Protection Board

Q2. Consider the following items listed as pillars of the 'Towards 2030: India–EU Joint Comprehensive Strategic Agenda' endorsed at the 16th India–EU Summit: 1. Prosperity and sustainability 2. Technology and innovation 3. Climate finance and green hydrogen 4. Security and defence Which of the above is/are NOT correctly identified as a pillar of the Agenda?

  1. Prosperity and sustainability
  2. Technology and innovation
  3. Climate finance and green hydrogen
  4. Security and defence
  • A. 1 only
  • B. 2 and 3
  • C. 3 only
  • D. 3 and 4

Q3. With reference to the India–EU Trade and Technology Council outcomes that underpin the technology pillar of the India–EU FTA, consider the following areas: 1. Chip design 2. Heterogeneous integration 3. Quantum cryptographic hardware 4. Process Design Kit (PDK) for advanced processes Which of the above is/are correctly identified as areas of joint India–EU R&D in semiconductors under this framework?

  1. Chip design
  2. Heterogeneous integration
  3. Quantum cryptographic hardware
  4. Process Design Kit (PDK) for advanced processes
  • A. 1 and 2 only
  • B. 1, 2 and 4
  • C. 2, 3 and 4
  • D. 1, 3 and 4

Q4. In the context of the joint India–EU semiconductor R&D agenda, the term 'heterogeneous integration' refers to which one of the following?

  • A. The combination of multiple wafer-fabrication process nodes on a single monolithic silicon wafer
  • B. The packaging-level assembly of separately manufactured chiplets or dies with different functions and process technologies into a single advanced semiconductor package
  • C. The integration of analog sensors with digital microcontrollers on a printed circuit board for IoT devices
  • D. The mixing of logic and memory dies through conventional wire-bonding in legacy semiconductor packages

Q5. As announced in the Union Budget 2026–27, the financial provision earmarked for the India Semiconductor Mission (ISM) 2.0 for FY 2026–27 is:

  • A. Rs 500 crore
  • B. Rs 1,000 crore
  • C. Rs 2,000 crore
  • D. Rs 8,000 crore
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