UPSC Prelims Practice Questions — Union Minister Shri Ashwini Vaishnaw launches 2 nm semiconductor chip in Qualcomm in Bengaluru

Question 1

With reference to the India Semiconductor Mission (ISM) 2.0 as compared with the original Semicon India programme, consider the following statements: Which of the statements given above is/are correct?

Accepted Answer

1 and 2 only

Answer

1 only

Answer

2 and 3 only

Answer

1, 2 and 3

Question 2

Under the Design Linked Incentive (DLI) scheme of the Semicon India programme (2021), the Product Design Linked Incentive component provides which one of the following?

Accepted Answer

Reimbursement of up to 50% of eligible expenditure, subject to a ceiling of Rs 15 crore per application

Answer

An incentive of 4-6% of net sales, subject to a ceiling of Rs 30 crore

Answer

Fiscal support of 50% of capital expenditure for compound semiconductor units

Answer

A grant of 30% of eligible expenditure, subject to a ceiling of Rs 25 crore per application

Question 3

The Semicon India programme (2021) was approved with a total outlay of Rs 76,000 crore. Which one of its four component schemes provides fiscal support of up to 50% of project cost specifically for setting up silicon-based (CMOS) semiconductor fabrication units?

Accepted Answer

Scheme for Setting up of Semiconductor Fabs

Answer

Design Linked Incentive (DLI) Scheme

Answer

Scheme for Compound Semiconductors / Silicon Photonics / Sensors / ATMP-OSAT

Answer

Scheme for Setting up of Display Fabs

Question 4

Of the 10 projects approved under the Semicon India programme (with an envisaged investment of about Rs 1.6 lakh crore), how many are semiconductor fabrication (fab) units, as distinct from packaging units?

Accepted Answer

2

Answer

4

Answer

8

Answer

10

Question 5

Approved semiconductor projects such as the Tata Electronics fab at Dholera and the Micron facility in Gujarat are implemented through which of the following bodies, which serves as the nodal agency for the programme?

Accepted Answer

India Semiconductor Mission (ISM), under the Ministry of Electronics and Information Technology

Answer

Department for Promotion of Industry and Internal Trade (DPIIT)

Answer

Ministry of Heavy Industries

Answer

Invest India, under the Ministry of Commerce and Industry

Question 6

The 2 nm semiconductor chip unveiled in February 2026 at Qualcomm's Bengaluru facility was launched by the Union Minister who holds which combination of portfolios?

Accepted Answer

Electronics & IT; Railways; and Information & Broadcasting

Answer

Electronics & IT; Commerce & Industry; and Railways

Answer

Science & Technology; Electronics & IT; and Railways

Answer

Electronics & IT; Communications; and Information & Broadcasting

Question 7

The Qualcomm 2 nm chip design announced in February 2026 was developed across the company's Indian engineering centres located in the following cities: Which of the above is/are correctly identified as a centre where the design work was carried out?

Accepted Answer

1, 2 and 3

Answer

1 and 2 only

Answer

2, 3 and 4

Answer

1, 2, 3 and 4

Question 8

Advanced logic nodes of the 2 nm class, such as the chip designed by Qualcomm in India, rely on which transistor architecture, adopted at the leading edge as the successor to the FinFET design?

Accepted Answer

Gate-All-Around (GAA) nanosheet field-effect transistor

Answer

Planar MOSFET

Answer

Bipolar junction transistor

Answer

Silicon-on-insulator diode

Question 9

The India Semiconductor Mission (ISM) has been set up as an Independent Business Division, operating under the guidance of the Ministry of Electronics and Information Technology, within which of the following organisations?

Accepted Answer

Digital India Corporation

Answer

Software Technology Parks of India (STPI)

Answer

National Informatics Centre (NIC)

Answer

Centre for Development of Advanced Computing (C-DAC)

Question 10

Among the projects approved under the Semicon India programme (with cumulative envisaged investment of about Rs 1.6 lakh crore), which one entails the single largest individual investment?

Accepted Answer

Tata Electronics semiconductor fab at Dholera, Gujarat (about Rs 91,526 crore)

Answer

Tata Electronics OSAT unit in Assam (about Rs 27,120 crore)

Answer

Micron facility in Gujarat (about Rs 22,516 crore)

Answer

CG Power OSAT unit at Sanand, Gujarat (about Rs 7,600 crore)

Question 11

In the context of India's semiconductor drive, the term 'tape-out' — as in Qualcomm's 2 nm tape-out from its India centres — refers to which one of the following?

Accepted Answer

The finalisation of a chip's design and its release to a foundry for fabrication

Answer

The physical manufacturing of silicon wafers within a fabrication plant

Answer

The assembly, testing, marking and packaging (ATMP) of finished chips

Answer

The export of finished semiconductors to global markets

UPSC Prelims Practice Questions — Union Minister Shri Ashwini Vaishnaw launches 2 nm semiconductor chip in Qualcomm in Bengaluru

Q1. With reference to the India Semiconductor Mission (ISM) 2.0 as compared with the original Semicon India programme, consider the following statements: Which of the statements given above is/are correct?

Q2. Under the Design Linked Incentive (DLI) scheme of the Semicon India programme (2021), the Product Design Linked Incentive component provides which one of the following?

Q3. The Semicon India programme (2021) was approved with a total outlay of Rs 76,000 crore. Which one of its four component schemes provides fiscal support of up to 50% of project cost specifically for setting up silicon-based (CMOS) semiconductor fabrication units?

Q4. Of the 10 projects approved under the Semicon India programme (with an envisaged investment of about Rs 1.6 lakh crore), how many are semiconductor fabrication (fab) units, as distinct from packaging units?

Q5. Approved semiconductor projects such as the Tata Electronics fab at Dholera and the Micron facility in Gujarat are implemented through which of the following bodies, which serves as the nodal agency for the programme?

Q6. The 2 nm semiconductor chip unveiled in February 2026 at Qualcomm's Bengaluru facility was launched by the Union Minister who holds which combination of portfolios?

Q7. The Qualcomm 2 nm chip design announced in February 2026 was developed across the company's Indian engineering centres located in the following cities: Which of the above is/are correctly identified as a centre where the design work was carried out?

Q8. Advanced logic nodes of the 2 nm class, such as the chip designed by Qualcomm in India, rely on which transistor architecture, adopted at the leading edge as the successor to the FinFET design?

Q9. The India Semiconductor Mission (ISM) has been set up as an Independent Business Division, operating under the guidance of the Ministry of Electronics and Information Technology, within which of the following organisations?

Q10. Among the projects approved under the Semicon India programme (with cumulative envisaged investment of about Rs 1.6 lakh crore), which one entails the single largest individual investment?

Q11. In the context of India's semiconductor drive, the term 'tape-out' — as in Qualcomm's 2 nm tape-out from its India centres — refers to which one of the following?