UPSC Prelims Practice Questions — Prime Minister Shri Narendra Modi Inaugurates SEMICON India 2026; Unveils India’s Ambitious Roadmap for Transition to Semicon 2.0, with Expanded Support for Design, Manufacturing, Packaging, R&D and Talent Development

Q1. The India Semiconductor Mission, which drives India's long-term strategy for semiconductor and display manufacturing, has been constituted as an independent business division with administrative and financial autonomy within which one of the following bodies?

  • A. Semi-Conductor Laboratory, Mohali, the Government's captive chip fabrication unit
  • B. Centre for Development of Advanced Computing, the Government's premier R&D organisation
  • C. Digital India Corporation
  • D. Software Technology Parks of India, the autonomous society for electronics exports

Q2. The Advisory Committee constituted to steer the objectives of the India Semiconductor Mission and guide its executives is chaired by which one of the following?

  • A. The Principal Scientific Adviser to the Government of India
  • B. The Union Minister of Electronics and Information Technology
  • C. The Member (Science and Technology), NITI Aayog
  • D. The Minister of State for Electronics and Information Technology

Q3. Consider the following statements regarding the incentive components of the Semicon India Programme: 1. Under the Design Linked Incentive Scheme, the Product Design Linked Incentive is up to 50 per cent of eligible expenditure, subject to a ceiling of ₹15 crore per application. 2. Under the same scheme, the Deployment Linked Incentive is 6 per cent to 4 per cent of net sales turnover over five years, subject to a ceiling of ₹30 crore per application. 3. The modified scheme for compound semiconductor, silicon photonics, sensor and discrete semiconductor fabs and for ATMP/OSAT facilities provides fiscal support of 30 per cent of capital expenditure, as against 50 per cent for silicon fabs. Which of the statements given above is/are correct?

  1. Under the Design Linked Incentive Scheme, the Product Design Linked Incentive is up to 50 per cent of eligible expenditure, subject to a ceiling of ₹15 crore per application.
  2. Under the same scheme, the Deployment Linked Incentive is 6 per cent to 4 per cent of net sales turnover over five years, subject to a ceiling of ₹30 crore per application.
  3. The modified scheme for compound semiconductor, silicon photonics, sensor and discrete semiconductor fabs and for ATMP/OSAT facilities provides fiscal support of 30 per cent of capital expenditure, as against 50 per cent for silicon fabs.
  • A. 1 and 3 only
  • B. 1 and 2 only
  • C. 2 and 3 only
  • D. 1, 2 and 3

Q4. Which one of the following correctly states the year in which the Union Cabinet approved the Programme for Development of Semiconductors and Display Manufacturing Ecosystem in India, and the total financial outlay then sanctioned for it?

  • A. 2022, with an outlay of ₹76,000 crore
  • B. 2021, with an outlay of ₹76,000 crore
  • C. 2021, with an outlay of ₹1,27,500 crore
  • D. 2026, with an outlay of ₹1,27,500 crore

Q5. With reference to Semicon 2.0 approved by the Union Cabinet, consider the following as pillars of the scheme: 1. Support for chip design and intellectual property creation 2. Incentives for research and manufacturing of semiconductor machines, materials, chemicals and gases 3. Expansion of semiconductor assembly, testing and packaging capabilities 4. Production-linked incentive for large-scale assembly of finished mobile handsets Which of the above is/are correctly identified?

  1. Support for chip design and intellectual property creation
  2. Incentives for research and manufacturing of semiconductor machines, materials, chemicals and gases
  3. Expansion of semiconductor assembly, testing and packaging capabilities
  4. Production-linked incentive for large-scale assembly of finished mobile handsets
  • A. 1, 2 and 3
  • B. 1 and 3 only
  • C. 2, 3 and 4
  • D. 1, 2, 3 and 4

Q6. Consider the following statements comparing Semicon 2.0 with the earlier phase of the India Semiconductor Mission: 1. The total budget outlay approved for Semicon 2.0 is larger than the outlay under which the first phase of the mission operated. 2. Semicon 2.0 carries dedicated pillars for research and development in advanced technologies and for talent development, in addition to manufacturing support. 3. Semicon 2.0 supersedes the first phase by withdrawing fiscal support for fabrication units altogether, restricting incentives exclusively to design and packaging. Which of the statements given above is/are correct?

  1. The total budget outlay approved for Semicon 2.0 is larger than the outlay under which the first phase of the mission operated.
  2. Semicon 2.0 carries dedicated pillars for research and development in advanced technologies and for talent development, in addition to manufacturing support.
  3. Semicon 2.0 supersedes the first phase by withdrawing fiscal support for fabrication units altogether, restricting incentives exclusively to design and packaging.
  • A. 1 only
  • B. 2 and 3 only
  • C. 1, 2 and 3
  • D. 1 and 2 only

Q7. With reference to SEMICON India 2026, consider the following: 1. It is the fifth edition of the SEMICON India Conference and Exhibition. 2. It is being held at Yashobhoomi, the India International Convention and Expo Centre at Dwarka, New Delhi. 3. Its theme is 'Silicon to Systems: Building the Ecosystem'. 4. It is jointly organised by the India Semiconductor Mission and the World Semiconductor Council. Which of the above is/are NOT correct?

  1. It is the fifth edition of the SEMICON India Conference and Exhibition.
  2. It is being held at Yashobhoomi, the India International Convention and Expo Centre at Dwarka, New Delhi.
  3. Its theme is 'Silicon to Systems: Building the Ecosystem'.
  4. It is jointly organised by the India Semiconductor Mission and the World Semiconductor Council.
  • A. 1 and 2
  • B. 2 and 3
  • C. 3 and 4
  • D. 4 only

Q8. SEMICON India is organised on the Government's side by the India Semiconductor Mission, which functions under which one of the following Union Ministries?

  • A. Ministry of Heavy Industries, which administers the capital goods and automotive sectors
  • B. Ministry of Science and Technology, acting through the Department of Science and Technology
  • C. Ministry of Electronics and Information Technology
  • D. Ministry of Commerce and Industry, acting through the Department for Promotion of Industry and Internal Trade

Q9. Consider the following semiconductor projects approved under the India Semiconductor Mission and their stated locations: 1. The fab of Tata Electronics set up in partnership with Powerchip Semiconductor Manufacturing Corporation of Taiwan — Dholera, Gujarat 2. The assembly and test unit of Tata Semiconductor Assembly and Test — Morigaon, Assam 3. The unit of CG Power with Renesas of Japan and Stars Microelectronics of Thailand — Mohali, Punjab 4. The integrated silicon carbide compound semiconductor facility of SiCSem with Clas-SiC Wafer Fab of the United Kingdom — Bhubaneswar, Odisha Which of the above is/are correctly identified?

  1. The fab of Tata Electronics set up in partnership with Powerchip Semiconductor Manufacturing Corporation of Taiwan — Dholera, Gujarat
  2. The assembly and test unit of Tata Semiconductor Assembly and Test — Morigaon, Assam
  3. The unit of CG Power with Renesas of Japan and Stars Microelectronics of Thailand — Mohali, Punjab
  4. The integrated silicon carbide compound semiconductor facility of SiCSem with Clas-SiC Wafer Fab of the United Kingdom — Bhubaneswar, Odisha
  • A. 1, 2 and 4
  • B. 1 and 3
  • C. 2 and 4 only
  • D. 1, 3 and 4

Q10. With reference to projects approved under the India Semiconductor Mission, consider the following statements: 1. The Tata Electronics unit at Dholera is the first commercial semiconductor fab approved in the country. 2. Micron, Kaynes Semicon and CG Semi are among the approved units that have commenced commercial production. 3. Every semiconductor project sanctioned under the mission so far is located in Gujarat and Assam. 4. The mission finances the entire capital expenditure of each approved fabrication unit. Which of the statements given above is/are NOT correct?

  1. The Tata Electronics unit at Dholera is the first commercial semiconductor fab approved in the country.
  2. Micron, Kaynes Semicon and CG Semi are among the approved units that have commenced commercial production.
  3. Every semiconductor project sanctioned under the mission so far is located in Gujarat and Assam.
  4. The mission finances the entire capital expenditure of each approved fabrication unit.
  • A. 1 and 2
  • B. 3 and 4
  • C. 2 and 3
  • D. 1 and 4

Q11. Under the Semicon India Programme, facilities for semiconductor Assembly, Testing, Marking and Packaging (ATMP) and outsourced semiconductor assembly and test (OSAT) draw their fiscal support from the same modified scheme as which one of the following?

  • A. Silicon fabs of all technology nodes without exception
  • B. Display fabs based on TFT-LCD and AMOLED technologies
  • C. Compound semiconductor, silicon photonics, sensor and discrete semiconductor fabs
  • D. Chip design efforts of domestic startups and MSMEs supported for design and deployment

Q12. With reference to the Chips to Startup (C2S) Programme, consider the following statements: 1. It was launched by the Ministry of Electronics and Information Technology in 2022 with an outlay of ₹250 crore spread over five years. 2. It targets the development of about 85,000 industry-ready professionals at the undergraduate, postgraduate and doctoral levels. 3. Commercial electronic design automation tools supplied under the programme are available in academic institutions, with expansion from 315 to 500 institutions envisaged under the next phase of the mission. 4. Chips designed by participating institutions are fabricated exclusively at the Tata–Powerchip fab at Dholera. Which of the statements given above is/are correct?

  1. It was launched by the Ministry of Electronics and Information Technology in 2022 with an outlay of ₹250 crore spread over five years.
  2. It targets the development of about 85,000 industry-ready professionals at the undergraduate, postgraduate and doctoral levels.
  3. Commercial electronic design automation tools supplied under the programme are available in academic institutions, with expansion from 315 to 500 institutions envisaged under the next phase of the mission.
  4. Chips designed by participating institutions are fabricated exclusively at the Tata–Powerchip fab at Dholera.
  • A. 1 and 2 only
  • B. 1, 2 and 3
  • C. 2, 3 and 4
  • D. 1, 2, 3 and 4