Summit exploring challenges, opportunities in semiconductor industry to be held tomorrow

1. At a Glance

• SRM Institute of Science and Technology (SRMIST) and The Hindu Group are holding the Semiconductor Summit 2026 in Chennai. It brings together industry, researchers, policymakers, academics and students to discuss India's semiconductor ecosystem. [2]
• The summit covers chip design, advanced manufacturing, AI, defence applications, geopolitical competition, talent development and next-generation semiconductor technologies. [2]
• Why it matters for UPSC: semiconductors link GS-III topics (industrial policy, Make in India, science and technology, security) with GS-II topics (US–China rivalry, export controls, partnerships such as India–Germany).
• India's main policy tool is the India Semiconductor Mission (ISM). Its next phase, ISM 2.0, is the current policy hook. [1]

2. Why in the News

• Trigger: The Hindu (Chennai edition, Mon 26 Oct 2026, p. 10) reported that the summit will be held "on Tuesday", which is 27 Oct 2026. [2]
• Chief guest: Kamaljeet Singh, Director-General of the Semiconductor Laboratory (SCL), MeitY. His keynote is titled "Overview of New Frontiers in Semiconductors". [2]
• Special addresses: Michael Hasper, Consul General of the Federal Republic of Germany, and C. Muthamizhchelvan, Vice-Chancellor of SRMIST. [2]
• First panel: "The Chip War: Technology, Geopolitics and India's Challenges", on global semiconductor rivalries, U.S.–China tensions and export controls. [2]
• Wider context: ISM 2.0 was announced in Union Budget 2026–27. [1]

3. Background & Evolution

• Why India wants chips: to build domestic capability in a "strategically important industry" and to develop a skilled workforce for it (the summit's stated objective). [2]
• Milestones:
• Dec 2025: 10 ISM projects worth ₹1.60 lakh crore had been approved across six states. [1]
• 2026: ISM 2.0 announced in Union Budget 2026–27, with ₹1,000 crore for FY 2026–27. [1]

• ISM 2.0 focus: domestic production of semiconductor equipment and materials, full-stack Indian semiconductor IP design, and stronger domestic and global supply chains. [1]

• Predecessor institution: SCL is a MeitY-linked public semiconductor laboratory. Its DG is the summit's chief guest. [2]

4. Core Static Facts

5. Multi-Dimensional Analysis

Economic

• ₹1.60 lakh crore of approved investment across six states by Dec 2025 shows how much capital the sector needs. [1]
• ISM 2.0 targets equipment and materials, which is an upstream segment. That marks a shift from assembly and fabrication incentives toward deeper value capture. [1]

Geopolitical / Strategic

• The "Chip War" framing (US–China tensions, export controls) means semiconductors are now a question of techno-security and supply-chain alignment. [2]
• A German diplomat's participation points to India–EU/Germany cooperation in technology. [2]
• Defence applications are an explicit focus area, which ties chips to strategic autonomy. [2]

Scientific / Technological

• Focus areas include chip design, advanced manufacturing and next-generation semiconductor technologies. [2]
• ISM 2.0's goal of full-stack Indian semiconductor IP targets the design-IP gap. [1]

Social / Human Capital

• Talent development and a skilled workforce are core objectives. Universities such as SRMIST serve as talent pipelines. [2]

Governance / Administrative

• The summit's stated aim is academia–industry–policymaker dialogue, a triple-helix model of innovation governance. [2]
• Projects are spread across six states by Dec 2025, so delivery depends on Centre–State coordination on land, power, water and incentives. [1]

6. Recent Developments (last 12–18 months)

• Dec 2025: 10 ISM projects worth ₹1.60 lakh crore approved across six states. [1]
• Feb 2026: ISM 2.0 announced in Union Budget 2026–27, with ₹1,000 crore for FY 2026–27. [1]
• 26 Oct 2026: The Hindu announced the Semiconductor Summit 2026 in Chennai. [2]
• 27 Oct 2026: The summit takes place. Keynote by the SCL DG; first panel on the Chip War. [2]

7. Prelims Hooks

• Semiconductor Summit 2026 is organised by SRMIST with The Hindu Group in Chennai. [2]
• The Semiconductor Laboratory (SCL) comes under MeitY, not the Department of Science and Technology or DRDO. [2]
• The SCL Director-General is Kamaljeet Singh, chief guest at the summit. [2]
• The keynote was titled "Overview of New Frontiers in Semiconductors". [2]
• The first panel was "The Chip War: Technology, Geopolitics and India's Challenges". [2]
• Germany was represented by its Consul General, Michael Hasper. [2]
• ISM 2.0 was announced in Union Budget 2026–27. [1]
• ISM 2.0 has a provision of ₹1,000 crore for FY 2026–27. [1]
• ISM 2.0 focuses on semiconductor equipment and materials and full-stack Indian IP. [1]
• As of Dec 2025, 10 ISM projects were approved, worth ₹1.60 lakh crore. [1]
• Those approved ISM projects were spread across six states. [1]

8. Is a ₹76,000 Crore Chip Subsidy Worth It?

• The strongest objection: the State pays for most of the plant, and the technology is not the latest
• The Semicon India Programme started in December 2021 with an outlay (money set aside) of ₹76,000 crore [5].
• Under it, the Centre pays about half of a plant's cost. States often add more on top [5].
• Even India's flagship fab is changing plan. Tata Electronics' first fab will use older chip technology, after reports of a shift from 28nm to 90nm. (A nanometre size, or node, is how small the circuits are. A smaller node means a more advanced chip.) [6][7]

• So critics ask: why spend this much public money to make chips that Taiwan and China already make cheaply?

• The answer: older chips are the chips India actually needs

• Cars, power grids, phones' power circuits and most defence electronics run on older-node chips. They do not need the newest node.

• The 'Chip War' panel's topic, export controls, shows that supply can be cut off for political reasons [2]. A plant at home is insurance against that, not a bet on beating Taiwan.

• What the critics get right

• Insurance only pays off if plants actually start producing. Reports give different dates for Dholera's first output, from late 2026 to around 2028 [7].
• A subsidy that pays for the building, but cannot deliver a working plant on time, gives India neither cheap chips nor security.

9. Why Money Alone Cannot Run a Fab

• A fab drinks huge amounts of very pure water
• A typical fab can use up to 10 million gallons of ultrapure water a day (water cleaned far beyond drinking quality, so it cannot damage the chips) [7].
• Several of the approved plants are in water-stressed western India. A short water supply can stop a whole production line.

• Industry at Semicon India 2025 named infrastructure, meaning water, steady power and logistics, as a key challenge [8].

• India has chip designers, but not fab workers

• India has about 20% of the world's chip design talent [7].
• Running a fab needs different people: process engineers, cleanroom staff (people who work in dust-free rooms) and technicians. These skills are scarce [7].
• TeamLease projected a shortage of 2.5–3 lakh semiconductor professionals by 2027 [7].

• Engineers trained in Taiwan have been slow to return [7]. So training abroad does not, on its own, fill Indian plants.

• Why this matters for the summit

• The summit's own aim is a 'skilled workforce' [2]. But a university can teach design in a classroom. Fab skills need hands-on time inside a real fab, and India has very few of those yet.

10. Why ISM 2.0's ₹1,000 Crore Is a Small Start Upstream

• The upstream gap is very large
• India still imports more than 90% of its semiconductor equipment, and most of its speciality chemicals and gases [5].
• ISM 2.0 now names equipment and materials as a target [1]. But its provision for FY 2026–27 is only ₹1,000 crore [1].

• Compare this with ₹1.60 lakh crore approved for just 10 plants [1]. The new focus is right, but in its first year it gets very little money next to the plants.

• Design startups get small cheques and depend on venture capital

• The Design Linked Incentive (DLI) Scheme supports 24 chip-design startups. It gives up to ₹15 crore per company [4].
• Only 14 of the 24 have raised venture capital (money from private investors) [4].

• ₹15 crore is small for a chip company. Each tape-out (sending a finished design to a fab to be made) costs a lot. So a startup without private investors finds it hard to grow.

• Results so far are real but early

• DLI firms have completed 16 tape-outs, and six chips have been fabricated [4].
• Funds are released only when firms meet milestones, including putting their chips into use [4]. This protects public money. But it also means slow cash for young firms.

11. What MeitY and the States Should Do Next

• MeitY should scale DLI to match its own target
• MeitY wants at least 50 fabless companies in the next phase [4]. (A fabless company designs chips but pays others to make them.)

• With 24 startups today and only 14 backed by investors [4], reaching 50 needs a bigger per-company limit or a government co-investment fund. Today's ₹15 crore cap is too small for that.

• MeitY should keep widening shared design tools

• The ChipIN Centre already gives shared EDA tools (Electronic Design Automation, the software used to design chips) to about 1 lakh engineers and students in 400 organisations [4].

• This is the cheapest way to grow design talent. Institutions like SRMIST can plug into it instead of buying costly licences.

• Host States should promise water and power before plants are built

• Industry has said infrastructure is a main bottleneck [8], and one fab can need millions of gallons of ultrapure water each day [7].

• States competing for plants should commit to dedicated water and steady power in the project agreement, not only land and tax breaks.

• Skill bodies should train for fab jobs, not only design jobs

• An NSDC report from 2022 found too few skilled workers for fab operations [7].
• NSDC and MeitY can link courses to the approved ATMP plants (Assembly, Testing, Marking and Packaging units, where finished chips are packed and tested), such as Micron's at Sanand, which is reported as operational [7]. That gives trainees hands-on work before the large fabs open.

12. Anchors for Answers

• Data: India imports more than 90% of its semiconductor equipment [5]; 10 ISM projects worth ₹1.60 lakh crore approved by Dec 2025 [1]; DLI scheme: 24 startups, 16 tape-outs, six chips fabricated [4]
• Data: Projected shortage of 2.5–3 lakh semiconductor professionals by 2027 (TeamLease) [7]
• Report/Committee: NSDC skill-gap report (2022) on the shortage of fab workers [7]
• Scheme: Semicon India Programme (Dec 2021, ₹76,000 crore), with about 50% Central support for plant costs [5]; Design Linked Incentive Scheme for fabless startups, up to ₹15 crore per company [4]

13. Mains Relevance

• GS-III: Indian economy and industrial policy; infrastructure; science and technology developments and their applications; indigenisation of technology; security challenges (supply chains, defence electronics).
• GS-II: Effect of the policies and politics of developed countries on India's interests (US–China rivalry, export controls); bilateral relations (India–Germany).
• Possible question stems: 1. The 'Chip War' between major powers is both a risk and an opportunity for India. Examine with reference to the India Semiconductor Mission. 2. ISM 2.0 marks a shift from fabrication incentives to ecosystem depth. Critically analyse. 3. Human capital, not capital subsidy, is the binding constraint on India's semiconductor ambitions. Discuss.

14. Related Topics to Study Next

• India Semiconductor Mission and Semicon India Programme: the parent policy framework behind ISM 1.0 and 2.0.
• Production Linked Incentive (PLI) for electronics: the downstream electronics manufacturing incentives that complement chips.
• US CHIPS and Science Act and export controls: the external driver of the "Chip War".
• iCET / TRUST (India–US) and India–EU Trade and Technology Council: technology partnerships and supply-chain alignment.
• Critical minerals and rare earths: materials inputs, which ISM 2.0 targets.
• Defence indigenisation (Positive Indigenisation Lists): defence electronics demand for trusted chips.
• AI compute (IndiaAI Mission): a source of demand for advanced chips.

15. NCERT Concepts to Revise

• India Semiconductor Mission (Geography): ISM and its next phase ISM 2.0 are the central policy the whole note revolves around.
• Export controls (Economy): US–China chip restrictions drive the 'Chip War' panel and shape India's opportunities and risks.
• Supply chain resilience (Economy): ISM 2.0 aims to strengthen domestic and global chip supply chains against geopolitical disruption.
• Industrial policy (Economy): Funding approvals and the shift to equipment, materials and IP are examples of state-led industrial strategy.
• Human capital (Economy): Talent development and a skilled workforce are stated goals and a likely Mains angle.
• Production-linked incentive (Economy): PLI-style incentives are the sister scheme for electronics manufacturing that complements chip incentives.

16. Common Errors / Trap Areas

• Wrong ministry: SCL and ISM sit under MeitY, not DST or DRDO. [1][2]
• ISM 1.0 vs ISM 2.0: the ₹1,000 crore figure is the FY 2026–27 provision for ISM 2.0. It is not the total outlay of the semiconductor programme. [1]
• Project counts change: "10 projects / ₹1.60 lakh crore" is the Dec 2025 figure. Later counts reported in the media are higher, so always attach a date to the figure you quote. [1]
• Event vs government programme: Semiconductor Summit 2026 is an academic and media event (SRMIST–The Hindu). Do not confuse it with the government's SEMICON India conference series.
• "Compound semiconductors" vs silicon fabs: ISM 2.0 adds equipment, materials and IP. Do not reduce the mission to fabs alone. [1]