Government Notifies India’s First Chip Fabrication Plant at SEZ Dholera

1. At a Glance

• Centre notified a Special Economic Zone (SEZ) dedicated to Electronic Hardware/Software/IT-ITES at Dholera, Gujarat, to be set up by M/s Tata Semiconductor Manufacturing Pvt Ltd (TSMPL) — India's first chip fabrication plant [1].
• Operationalises the India Semiconductor Mission (ISM) through the SEZ Act, 2005 framework, marking the country's entry into commercial wafer fabrication [1][2].
• UPSC relevance: intersection of Industrial policy + Atmanirbhar Bharat + Strategic tech + S&T (GS-III) and SEZ governance (GS-II/III).

2. Why in the News

• 16 April 2026: Ministry of Commerce & Industry notified the Dholera SEZ for TSMPL — making it India's first notified SEZ exclusively for semiconductor fabrication [1].
• Follows the SEZ Rules amendment of 3 June 2025 that relaxed minimum land requirement (50 ha → 10 ha) and DTA-sales norms to accommodate semiconductor fabs [1].

3. Background & Evolution

• Dec 2021: Union Cabinet approved the ₹76,000 crore Semicon India Programme; India Semiconductor Mission (ISM) set up under MeitY [2].
• 29 Feb 2024: Cabinet approved three semiconductor units, including the Tata–PSMC fab at Dholera with outlay ₹91,000 crore, capacity 50,000 wafer starts per month (WSPM) [2].
• 13 Mar 2024: PM laid foundation stone of three semiconductor facilities (~₹1.25 lakh crore) under India's Techade: Chips for Viksit Bharat [2].
• 2025: Fiscal Support Agreement (FSA) signed by ISM, Tata Electronics (TEPL) and TSMPL in presence of Gujarat CM Bhupendra Patel [2].
• 3 Jun 2025: SEZ Rules, 2006 amended for semiconductor sector [1].
• 16 Apr 2026: SEZ notified [1].

4. Core Static Facts

SEZ Rule changes (Jun 2025) to accommodate fabs [1]:

• Minimum land: 50 ha → 10 ha.
• Flexibility in encumbrance norms.
• Free-of-cost supplies counted in Net Foreign Exchange (NFE).
• Domestic Tariff Area (DTA) sales permitted on payment of duties.

5. Multi-Dimensional Analysis

Economic

• Single largest FDI-linked greenfield manufacturing project in electronics; cuts import dependence (India's electronics imports dominated by chips) [2].
• DTA-sales clause makes the SEZ output usable for domestic OEMs — reduces forex outflow while preserving export orientation [1].

Geopolitical / Strategic

• PSMC partnership aligns India with Taiwan's foundry ecosystem, hedging supply chains amid US-China chip rivalry [2].
• Supports Quad's resilient semiconductor supply-chain initiative.

Scientific / Technological

• Establishes logic + memory foundry capability; PSMC operates 6 foundries in Taiwan [2].
• First commercial wafer fab on Indian soil (earlier units were OSAT/ATMP — assembly/test/packaging) [2].

Administrative / Federal

• Land enabled by Gujarat via Dholera Special Investment Region; Centre provides fiscal support via ISM [2].
• SEZ Act gives single-window approval through Board of Approval and Development Commissioner [1].

Legal

• Rule-making power under Section 55, SEZ Act 2005 used for the 2025 amendment [1].

6. Recent Developments (12-18 months)

• Mar 2025: ISM-TEPL-TSMPL Fiscal Support Agreement signed at Dholera [2].
• 3 Jun 2025: SEZ Rules amended to enable semiconductor fabs [1].
• 2025: Cabinet approved additional fabs in Odisha, Punjab, Andhra Pradesh (₹4,600 cr outlay) [2].
• 16 Apr 2026: SEZ Dholera officially notified [1].

7. Prelims Hooks

• Dholera SEZ developer: Tata Semiconductor Manufacturing Pvt Ltd (not Tata Electronics directly) [1].
• SEZ area: 66.166 hectares [1].
• Projected employment: 21,000 [1].
• Tech partner: PSMC, Taiwan [2].
• Fab capacity: 50,000 wafer starts per month [2].
• Investment: ₹91,000 crore [2].
• Cabinet approval date: 29 February 2024 [2].
• Foundation stone: 13 March 2024 under Chips for Viksit Bharat [2].
• Nodal ministry for SEZ notification: Ministry of Commerce & Industry [1].
• Nodal ministry for ISM: MeitY [2].
• SEZ minimum land reduced from 50 ha to 10 ha for semiconductor sector (notification dated 3 June 2025) [1].
• ISM launched under Semicon India Programme, outlay ₹76,000 crore (2021) [2].
• Dholera lies in the Delhi-Mumbai Industrial Corridor (DMIC) — Gujarat node.
• India's first commercial chip fabrication (fab) plant — distinct from Assam's OSAT/ATMP unit (Tata Semiconductor Assembly & Test, Morigaon) [2].

8. Mains Relevance

• GS-III: Indian Economy — Industrial policy, Growth & Development; S&T — Indigenization of technology.
• GS-II: Government policies & interventions; Centre-State coordination.
• Question stems: 1. "Discuss how SEZ-led incentives complement the India Semiconductor Mission in building a domestic chip ecosystem. Examine the 2025 amendments to SEZ Rules." 2. "Critically evaluate India's strategy of partnering with foreign foundries (e.g., PSMC) for semiconductor self-reliance. What are the strategic vulnerabilities?" 3. "The Dholera fab marks a shift from OSAT to fabrication in India's semiconductor journey. Analyse the technological and economic implications."

9. Related Topics to Study Next

• India Semiconductor Mission (ISM) — parent programme.
• Semicon India Programme (Dec 2021, ₹76,000 cr) — fiscal scheme.
• SEZ Act 2005 & Baba Kalyani Committee (2018) — reform context.
• Delhi-Mumbai Industrial Corridor / Dholera SIR — locational context.
• PLI Scheme for Electronics & Large-Scale Manufacturing — complementary incentive.
• Tata-Assam OSAT plant (Morigaon) — contrast: assembly vs fabrication.
• Quad Semiconductor Supply Chain Initiative — geopolitics.
• Critical & Emerging Technologies (iCET) with USA — tech-diplomacy linkage.

10. Common Errors / Trap Areas

• Fab vs OSAT confusion: Dholera is fabrication; Morigaon (Assam) is assembly & testing.
• Ministry mix-up: SEZ notification = Commerce & Industry; ISM/fiscal support = MeitY (not DST or DPIIT alone).
• Developer name: notified entity is TSMPL, a Tata Electronics subsidiary — not "Tata Sons" or "TCS".
• Land area: 66.166 ha (post-amendment minimum is 10 ha, not 50 ha — older GS notes may be outdated).
• Investment vs outlay: ₹91,000 cr is project investment; ₹76,000 cr is the Semicon India programme outlay — do not conflate.