Critically examine India's readiness — in terms of infrastructure, skilled manpower, and policy support — to become a global semiconductor hub.

Semiconductors are, as the Prime Minister noted at the Semiconductor Executives' Roundtable, "the basis of the Digital Age" [1]. India has moved from intent to approvals, but its readiness is uneven — strong in design talent and policy signalling, weak in fabrication infrastructure and value capture.

Infrastructure: entry secured at the low-value end

• Ten projects worth Rs 1.6 lakh crore stand approved, but only one is a foundry; nine are OSAT assembly-and-testing units — the lowest-value step in the chain [2].
• This is a realistic start: a modern fab costs about USD 10 billion, and advanced EUV lithography tools (~USD 150 million each) come from a single global supplier, ASML [3].
• Enabling infrastructure lags — unreliable and costly power, against Taiwan's clusters offering uninterrupted power and water, 0% VAT and a 17% corporate tax cap [2]. India remains a net chip importer of USD 23.5 billion (2024), with 0.02% of world chip exports [2].

Manpower: abundant talent, absent ownership

• About 20% of the world's chip design engineers work in India, yet India's own design industry earns under Rs 150 crore annually — the IP rests with foreign parents [2].
• NITI Aayog flags too few electronics-manufacturing institutes and a training-industry mismatch across operator, supervisory and leadership levels [2].

Policy support: credible, but under-delivered and out-spent

• The Design Linked Incentive scheme has backed 23 companies, and ISM 2.0 (Budget 2026-27) rightly targets equipment, materials and full-stack Indian IP [2].
• However, Semicon India used only 9% of its budget in 2024-25 [2], and India's ~USD 10 billion offer is modest beside the US CHIPS Act (~USD 280 billion) and EU Chips Act (~USD 46 billion) [3].

India is therefore partially ready — competitive in talent and political facilitation, not yet in fabrication depth or cost. Enforcing NITI Aayog's single-window clearance reform, publishing milestone-wise scheme progress, and enlarging design incentives to retain IP can convert approvals into an assured place in the global value chain.