How does global chip supply-chain diversification create opportunities and challenges for India's semiconductor ambitions?
In this answer
Post-pandemic "China+1" strategies and export controls are pushing chip supply chains out of their concentration in Taiwan and East Asia. India, through the India Semiconductor Mission, is bidding for that displaced capacity — a genuine window, but one where its early gains sit at the lower-value end of the chain.
Opportunities created
- Direct access to global majors: the Prime Minister chaired a Semiconductor Executives' Roundtable with Micron, Applied Materials, Tokyo Electron, Rapidus, Synopsys and others, with easing the compliance burden flagged as a policy pillar [1].
- Entry through packaging: 10 projects worth Rs 1.6 lakh crore were approved by December 2025 — one foundry and nine OSAT (assembly-testing) units [2]. Given a fab costs about USD 10 billion, this is a realistic first rung [2].
- Legacy nodes as a niche: automotive and appliance chips use older 180-40 nm and 130-90 nm nodes, within India's reach [3].
- Design talent and supplier linkages: about 20% of the world's chip-design engineers work in India [2], while domestic firms like CG Power and Kaynes sat alongside global majors [1].
Challenges it exposes
- Subsidy competition: India's Rs 76,000 crore (~USD 10 billion) is modest against the US CHIPS Act (~USD 53 billion for fabs) and the EU Chips Act (~USD 46 billion) [3] — the same CEOs are courted on three continents.
- Cost disability: components cost 14-18% and assembly 10-14% more than in China, with borrowing 5-6 percentage points costlier [2].
- Weak value capture: India's own design industry earns under Rs 150 crore annually because IP stays with foreign parents [2]; net chip imports were USD 23.5 billion in 2024 [2].
- Delivery gap: only 9% of the Semicon India budget was spent in 2024-25 [2], and fabs need uninterrupted power and ultrapure water [2].
Diversification has given India entry, not arrival. Converting it requires moving from packaging toward fabrication and Indian-owned IP — the direction of ISM 2.0 on equipment, materials and full-stack design [2] — backed by NITI Aayog's single-window clearance reform [2]. Executed steadily, the China+1 moment can anchor genuine technological self-reliance.
Sources
- 1PM chairs Semiconductor Executives' Roundtable, PIBroundtable attendees, compliance-burden pillar, presence of CG Power and Kaynes
- 2PRS Legislative Research, Demand for Grants 2026-27 Analysis: MeitY (March 2026)10 approved projects and Rs 1.6 lakh crore, fab cost, 20% design engineers, Rs 150 crore design revenue, cost disability, 9% utilisation, USD 23.5 billion imports, power/water constraints, ISM 2.0, NITI single-window
- 3PRS Legislative Research, Science & Technology Policy Brief: Semiconductor Chip Manufacturing (March 2023)legacy node sizes, Rs 76,000 crore outlay, US CHIPS Act and EU Chips Act comparisons