Semicon 2.0 to deepen India’s semiconductor ecosystem with focus on design, equipment, fabs, advanced packaging, R&D and talent

1. At a Glance

• Semicon India 2.0 (ISM 2.0) is the second-phase policy framework to deepen India's semiconductor ecosystem — covering design, equipment/materials manufacturing, fabs, advanced packaging, R&D and talent development [1][4].
• Approved by the Union Cabinet with a total budget outlay of ₹1,27,500 crore [4].
• Builds on the original Semicon India Programme (2021), shifting focus from just attracting fabs to building a full-stack indigenous ecosystem including chip-making equipment and IP [1][2].
• High UPSC relevance: links GS-III (S&T, Indian economy, infrastructure), Make in India/Atmanirbhar Bharat, and PLI-linked industrial policy debates.

2. Why in the News

• Announced/launched via the Union Budget 2026-27, which formally proposed India Semiconductor Mission (ISM) 2.0 [1][6].
• Subsequently, the Union Cabinet chaired by PM Narendra Modi approved Semicon 2.0, providing long-term policy support to semiconductors in India with a ₹1,27,500 crore outlay [4].
• As of December 2025, 10 projects worth ₹1.60 lakh crore stand approved across 6 states, with commercial production commenced at Micron and Kaynes plants and two more expected to start production within the year [1][3].

3. Background & Evolution

• 2021: Cabinet approved the original "Programme for Development of Semiconductors and Display Manufacturing Ecosystem in India" — the foundational Semicon India Programme [5].
• Design Linked Incentive (DLI) Scheme launched under ISM 1.0 to support domestic chip-design companies, startups and MSMEs — offering product design-linked incentive up to 50% of eligible expenditure and deployment-linked incentive of 6%–4% of net sales for 5 years, targeting support to 100 domestic design companies, with at least 20 expected to cross ₹1,500 crore turnover within five years [6].
• 23 chip-design projects sanctioned for financial support under DLI [6].
• ISM 1.0 delivered India's first Made-in-India chips, presented to PM Modi, and inauguration of Micron Semiconductor Technology India's facility in Gujarat [1].
• Budget 2026-27 formally announced ISM 2.0, later operationalised via Cabinet approval [1][4].

4. Core Static Facts

5. Multi-Dimensional Analysis

Economic

• Aims to reduce import dependence on semiconductors, a critical input for electronics, automobiles, telecom and defence manufacturing [3].
• Investment of ₹1.60 lakh crore signals large-scale capital formation and potential employment generation in high-tech manufacturing [1][3].

Scientific/Technological

• Shift toward full-stack Indian semiconductor IP, chip/system design capability, and indigenous ATMP (Assembly, Testing, Marking, Packaging) technologies [1][3].
• Roadmap targeting advanced 3nm/2nm nodes, moving India up the technology value chain beyond legacy/mature nodes [1].

Strategic/Geopolitical

• Reduces dependence on concentrated global semiconductor supply chains (Taiwan, South Korea, China), relevant amid US-China tech competition [3].
• Positions India as an alternative node in "friend-shoring" of critical technology supply chains.

Administrative

• Multi-state implementation (6 states) requires Centre-state coordination on land, power, water-intensive fab infrastructure.
• Shift from ISM 1.0's fab-centric approach to a broader ecosystem approach (equipment, materials, design, packaging) increases implementation complexity [1][2].

Governance

• Long-term policy support signals continuity/predictability for investors — a key ask of the semiconductor industry given long gestation periods [4].

6. Recent Developments (last 12–18 months)

• Budget 2026-27: Formal announcement of ISM 2.0 [1][6].
• Cabinet approval of Semicon 2.0 with ₹1,27,500 crore outlay [4].
• December 2025: 10 projects (₹1.60 lakh crore) approved across 6 states, including new packaging and GaN Micro LED display fab units [1][3].
• Commercial production commenced at Micron and Kaynes plants; two more plants expected to start production within the year [1].
• PM Modi presented with first set of Made-in-India chips [1].

7. Prelims Hooks

• Nodal body for semiconductor policy: India Semiconductor Mission (ISM) under MeitY [1].
• Semicon 2.0 Cabinet-approved outlay: ₹1,27,500 crore [4].
• Cumulative semiconductor project investment approved (Dec 2025): ₹1.60 lakh crore across 10 projects, 6 states [1][3].
• First two plants to commence commercial production under ISM: Micron and Kaynes [1].
• Design Linked Incentive (DLI) Scheme: design incentive up to 50% of eligible expenditure [6].
• DLI deployment-linked incentive: 6%–4% of net sales over 5 years [6].
• DLI targets support to 100 domestic chip-design companies; ≥20 to cross ₹1,500 crore turnover [6].
• 23 chip-design projects sanctioned under DLI [6].
• 315 universities training students in chip design; ~68,000 students trained so far [6].
• India's technology-node roadmap target: 3nm and 2nm [1].
• India's goal: among top semiconductor nations globally by 2035 [1].
• Approved fab types include: 1 Silicon fab, 1 Silicon Carbide fab, 1 Gallium Nitride Micro LED Display fab, and 9 packaging units [3].
• Original Semicon India Programme (predecessor) approved by Cabinet in 2021 [5].

8. Announcing the Money Is Not the Same as Spending It

• The scheme has been unable to spend what it was already given
• Fund use under Semicon India was only 23% in 2023-24 and 9% in 2024-25; about 61% is expected to be spent in 2025-26 [7].

• In 2024-25 the Budget set aside ₹6,903 crore but actual spending was ₹638 crore [7].

• Why the money sits unspent — the payment rule, not a paperwork delay

• Incentives are paid only after a selected company meets its agreed targets [7].
• Fabs take years to build, so bills reach the government late. The outlay is a promise, not yearly spending.

• So a big headline number tells you very little about work on the ground.

• Semicon 2.0's first-year money is small next to its headline

• Against the ₹1,27,500 crore total outlay [4], ISM 2.0 got ₹1,000 crore in the 2026-27 Budget [7].
• For Mains, write the two numbers separately: outlay is spread over many years; the yearly allocation is what is actually available now.

9. Only One of the Ten Approved Projects Is a Silicon Fab

• Most approved units do packaging and testing, which sits at the bottom of the value chain
• Of the ten approved projects, only Tata Semiconductor Manufacturing, Dholera is a silicon wafer fab (₹91,526 crore, 50,000 wafer starts a month) [7].
• The rest are ATMP/OSAT units — assembly, testing, packaging — like Micron (Sanand), Tata (Morigaon), CG Power, Kaynes, HCL-Foxconn and Continental [7].

• Packaging is the last step. It earns less per chip than designing or fabricating one.

• The technology is largely borrowed, not built here

• The Dholera fab's technology partner is PSMC (Taiwan); other units partner Renesas (Japan), Hon Hai/Foxconn (Taiwan), APACT (South Korea), Clas-SiC (UK) [7].

• So India is buying process know-how, not yet owning it. The 3nm/2nm target [1] needs technology no partner currently sells to India.

• Read the trap carefully: 'ten projects approved' is not 'ten fabs'. Prelims and Mains both punish that slip.

10. India Designs Chips for the World but Owns Very Little of It

• The design gap is about ownership, not headcount
• About 20% of the world's semiconductor design engineers work in India, yet the domestic design industry's total revenue is under ₹150 crore [7].
• Only a small part of the intellectual property (IPR) created here belongs to Indian companies — most is owned by the foreign firms these engineers work for [7].

• IPR means the legal right over a chip design. Whoever holds it keeps the profit for the life of the chip.

• Chip design revenue is a near-closed club

• Japan, South Korea, Taiwan and the USA together earn about 80% of global chip design revenue, built on decades of R&D and existing IP [7].

• DLI uptake is running below its own target

• The DLI scheme aims to support 100 design companies [6]; as of December 2025, 23 companies (24 designs) had been supported [7].
• Semicon 2.0's 'full-stack Indian IP' goal is therefore being built on a very thin base.

11. The Cost Gap a Subsidy Cheque Does Not Close

• Making electronics in India costs 10–18% more than in China, before any subsidy
• NITI Aayog puts the cost disadvantage at 14–18% for components and 10–14% for assembly against China [7].
• It comes from tariffs and material costs (4–6%), logistics (2–3%) and costly finance (up to 4%) [7].

• Borrowing money in India costs about five to six percentage points more than international rates; China, Taiwan and Vietnam give interest subsidies that bring rates to 2–7% [7].

• Chips need steady power and water, which many sites cannot promise

• A modern semiconductor factory costs about USD 10 billion to set up, and power supply in many parts of India is still unreliable and expensive [7].

• Taiwan's tech clusters offer 0% VAT, corporate tax capped at 17%, and uninterrupted water and power — the package India's clusters have not matched [7].

• The import bill shows how far the start line is

• India was a net importer of chips worth USD 23.5 billion in 2024 [7].
• India's share of world chip exports is about 0.02% [7].
• Components are only 9% of India's electronics production (2023-24), against 42% worldwide — which is why so much is still only final assembly [7].

12. What the OECD Found About Countries That Paid for Chips

• Subsidies went up everywhere after 2020, so India is not buying an advantage — it is paying to stay in the race
• Chip subsidies as a share of company revenue have risen sharply since at least 2020 in most regions [8].

• Support to China-based chip firms grew from about 5% of revenue (2018-19) to 10% by 2023 [8].

• Subsidies did not actually move factories home

• Between 2017 and 2023, chip firms did not shift their physical factories back to their own countries, despite large subsidies [8].

• Money can buy one plant; it does not by itself move a supply chain.

• The OECD's own warning about where this ends

• It warns of three risks: subsidies with no additionality (paying for investment a firm would have made anyway), production beyond actual demand, and wasteful subsidy races between countries [8].
• It asks governments to make support transparent enough to be monitored [8].
• Use this as the balanced line in an answer: the case for Semicon 2.0 is strategic security, not cheaper chips.

13. The Strongest Defence of Semicon 2.0, and What It Still Owes

• The defence is real: this kind of incentive has worked in India before
• Under the PLI for large scale electronics, smartphone and telecom equipment exports rose from about USD 7 billion in 2022 to USD 22 billion in 2024 [7].

• Chip plants take years; Micron and Kaynes have already begun commercial production [1]. Judging a fab scheme by two years of spending is unfair.

• But the same family of schemes also shows how it can fail

• The IT Hardware PLI 2.0 reached only about 20% of its investment target and 3% of its production target [7].

• NITI Aayog (2026) found the main gainers of the electronics PLI were contract manufacturers for Apple — Foxconn, Tata Electronics, Pegatron, Samsung, Dixon — not Indian IP owners [7].

• NITI Aayog (2026): fix approvals before adding more money

• It found approvals fragmented across central, state and municipal portals, with repeated documents [7].

• It asked for the National Single Window System to cover all three levels of government, with standard forms and enforceable timelines backed by accountability [7].

• MeitY should rationalise duties that tax Indian manufacturers

• Machinery enters at zero customs duty, but critical parts and sub-parts attract 5% to 25%, so importing a finished good can be cheaper than making it here [7].

• NITI Aayog says further duty rationalisation is needed for long-term competitiveness [7].

• MeitY and ISM should treat skilling as a supply problem, not a numbers target

• NITI Aayog (2024) found too few institutes dedicated to electronics manufacturing, and skill gaps at every level — operators, technicians and senior engineers [7].
• Without a factory ecosystem, students get no hands-on training, so firms pay to train them abroad [7]. The 68,000 students trained figure [6] measures classroom reach, not fab-ready workers.

14. Anchors for Answers

• Data: Semicon India fund use — 23% (2023-24), 9% (2024-25), about 61% expected in 2025-26 [7]
• Data: India was a net chip importer of USD 23.5 billion in 2024; share of global chip exports about 0.02% [7]
• Data: Domestic chip design industry revenue under ₹150 crore, though about 20% of the world's chip design engineers work in India [7]
• Data: Cost disadvantage against China — 14–18% for components, 10–14% for assembly [7]
• Report/Committee: PRS Demand for Grants 2026-27 Analysis, MeitY (March 2026) [7]; NITI Aayog assessments of the ESDM sector (2024, 2026) [7]
• Report/Committee: OECD, Recent Trends in Semiconductor Subsidies (April 2025) [8]
• Comparison: Taiwan's tech clusters offer 0% VAT, corporate tax capped at 17% and uninterrupted water and power — India's EMC clusters do not [7]
• Comparison: OECD finds chip firms did not move factories home between 2017 and 2023 despite large subsidies [8]
• Scheme: PLI for large scale electronics — smartphone/telecom exports USD 7 bn (2022) to USD 22 bn (2024), but IT Hardware PLI 2.0 hit only 3% of its production target [7]
• Scheme: Electronics Component Manufacturing Scheme (ECMS), outlay ₹22,919 crore, 24 applications approved as of December 2025 — the component gap Semicon 2.0 depends on [7]

15. Mains Relevance

• GS-III: Indian Economy (infrastructure, investment models), Science & Technology (indigenisation of technology, developments in electronics/IT), Industrial Policy.
• GS-II (tangential): Government policies and interventions for development in various sectors.
• Possible question stems: 1. Discuss the significance of India Semiconductor Mission 2.0 in building a full-stack semiconductor ecosystem. What challenges remain in India's quest for advanced-node fabrication? 2. Examine how India's semiconductor policy has evolved from ISM 1.0 to Semicon 2.0. How does this align with the goals of Atmanirbhar Bharat? 3. Semiconductor manufacturing is capital-, water-, and technology-intensive. Critically evaluate India's preparedness to compete in the global semiconductor value chain.

16. Related Topics to Study Next

• Atmanirbhar Bharat / Make in India — broader policy umbrella under which semiconductor push sits.
• Production Linked Incentive (PLI) Scheme — comparable industrial incentive mechanism across sectors.
• India-US/India-Taiwan tech cooperation — geopolitical dimension of chip supply chains.
• Critical Minerals Mission — inputs (rare earths, gallium) needed for chip manufacturing.
• National Quantum Mission — parallel deep-tech mission with similar design.
• Electronics System Design and Manufacturing (ESDM) sector — broader electronics ecosystem semiconductors feed into.
• Global semiconductor supply chain concentration (Taiwan/TSMC, South Korea) — comparative/strategic context.

17. Common Errors / Trap Areas

• Confusing ISM (India Semiconductor Mission) with MeitY itself — ISM is a specialised body under MeitY, not a separate ministry.
• Mixing up ISM 1.0 (2021, fab-focused) with Semicon 2.0/ISM 2.0 (2026, ecosystem-focused: equipment, materials, design IP, packaging, talent).
• Assuming Semicon 2.0's ₹1,27,500 crore outlay is the same as the ₹1.60 lakh crore cumulative investment figure — the former is government outlay under Semicon 2.0; the latter is total approved project investment (public+private) across 10 projects as of Dec 2025.
• Forgetting that the DLI Scheme targets chip design, not fabrication — a separate track from fab/packaging incentives.
• Assuming India already has advanced-node (3nm/2nm) fabs — these remain a roadmap target, not current capability.