Discuss the significance of India Semiconductor Mission 2.0 in building a full-stack semiconductor ecosystem. What challenges remain in India's quest for advanced-node fabrication?

Semiconductors are the base input of digital, automotive and defence manufacturing. Approved by the Union Cabinet with an outlay of ₹1,27,500 crore, Semicon 2.0 marks a shift from attracting fabs to owning the whole chain [1] — an ambition still constrained by cost, technology and absorptive capacity.

Significance for a full-stack ecosystem

• Six-pillar design: chip design, manufacturing equipment and materials, fabrication, packaging, R&D and talent — closing gaps ISM 1.0 left open [1].
• Moving beyond assembly: targets full-stack Indian semiconductor IP and domestic equipment/materials, against a base where 12 units worth over ₹1.64 lakh crore are approved, mostly packaging [1].
• Design depth: the Design Linked Incentive Scheme funds startups and MSMEs, with 23 chip-design projects sanctioned [2].
• Talent pipeline: over 67,000 students trained across 315 academic institutions using EDA tools [2].
• Strategic autonomy: reduces exposure to supply chains concentrated in Taiwan and South Korea; India was a net chip importer of USD 23.5 billion in 2024 [3].

Challenges in advanced-node fabrication

• Absorption, not allocation: fund use under Semicon India was 23% (2023-24) and 9% (2024-25); ISM 2.0 received only ₹1,000 crore for 2026-27 [3][4].
• Technology dependence: the sole silicon fab at Dholera relies on a Taiwanese partner; the 3nm/2nm roadmap needs know-how no partner currently transfers [3][4].
• Structural cost gap: NITI Aayog estimates a 14–18% disadvantage in components and 10–14% in assembly versus China, from tariffs, logistics and costly credit; power and water reliability remain weak [3].
• Thin design ownership: about 20% of the world's chip designers work in India, yet domestic design revenue and IP ownership stay marginal [3].
• Subsidy limits: the OECD finds firms did not reshore production during 2017–2023 despite large subsidies, warning of races lacking additionality [5].

Semicon 2.0's worth therefore lies in strategic resilience rather than cheaper chips. Pairing the outlay with single-window clearances, duty rationalisation and fab-linked skilling, as NITI Aayog urges, can convert approvals into genuine advanced-node capability by 2035.